amansingh@nitsri.net
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Department of ECE, NIT, Srinagar

Dr.Amandeep Singh

Assistant Professor

Nanoelectronics and VLSI Design: Semiconductor device modelling and circuit simulation using SPICE models, Novel Semiconductor Devices

Education

Degree Institute CGPA Year Subject Description
Ph. D. NIT, Jalandhar 2017 Nanoelectronics
M.TECH CDAC, Mohali 2012 VLSI Design
B.TECH BCET Gurdaspur 2010 ECE

Publications Journal

Month-Year Authors Paper Title Volume PageNo DOI Impact Factor Type Journal Name
2024 Sanna Mairaj and Amandeep Singh Compact Model for a Negative Capacitance‑Based Top‑Gated Carbon‑Nanotube Field‑Effect Transistor SCI Journal of Electronic Materials
2023 Sarabdeep Singh, Leo Raj Solay, Sunny Anand, Naveen Kumar, Ravi Ranjan, and Amandeep Singh Implementation of Gate-All-Around Gate-Engineered Charge Plasma Nanowire FET-Based Common Source Amplifier 14 1357, 2023 SCI Micromachines
2022 Anjana Bhardwaj, Leo Raj Solay, Naveen Kumar, S. Intekhab Amin, Amandeep Singh, Balwinder Raj, Pradeep Kumar, Sunny Anand Doping-less TFET Based Common Source Amplifier Implementation and Behaviour Analysis Under Symmetric and Asymmetric Conditions 14 12251-12260 SCI Silicon
2022 Mohd Ashraf Lone, Leo Raj Solay, Amandeep Singh, S. Intekhab Amin, Sunny Anand Design and Implementation of Negative Capacitance Based Electrostatic Doped Double Gate Tunnel Field Effect Transistor 14 12293-12301 SCI Silicon
2022 Sabzar Shafi Ganie and Amandeep Singh Gate All around CNTFET based Ternary Content Addressable Memory 11 061006 SCOPUS ECS Journal of Solid State Science and Technology
2021 Archika singh, Mumin Sajad, Amandeep Singh, Naveen Kumar, S. Intekhab Amin and Sunny Anand Design and analysis of negative capacitance based dual material dopingless tunnel FET 156 106964 SCI Superlattices and Microstructures
2019 Amandeep Singh, Mamta Khosla and Balwinder Raj Design and Analysis of Dynamically Configurable Electrostatic Doped Carbon Nanotube Tunnel FET 85 17-24 SCI Microelectronics Journal
2018 G. Saiphani Kumar, Amandeep Singh and Balwinder Raj Design and Analysis of Gate All Around CNTFET based SRAM cell 17 138-145 SCI Journal of Computational Electronics
2017 Amandeep Singh, Mamta Khosla and Balwinder Raj Analysis of Electrostatic Doped Schottky Barrier Carbon Nanotube FET for Low Power Applications 28 1762-1768 SCI Journal of Materials Science: Materials in Electronics
2017 Amandeep Singh, Mamta Khosla and Balwinder Raj Design and Analysis of Electrostatic Doped Schottky Barrier Carbon Nanotube FET based Low Power SRAM 80 67-72 SCI AEU -International Journal of Electronics and Communications
2016 Amandeep Singh, Mamta Khosla, and Balwinder Raj Comparative Analysis of Carbon Nanotube Field Effect Transistor and Nanowire Transistor for Low Power Circuit Design 11 388-393 SCOPUS Journal of Nanoelectronics and Optoelectronics
2016 Amandeep Singh, Mamta Khosla and Balwinder Raj Circuit compatible model for Electrostatic Doped Schottky Barrier CNTFET 45 5381-5390 SCI Journal of Electronic Materials
2016 Amandeep Singh, Dinesh Kumar Saini, Dinesh Agarwal, Sajal Aggarwal, Mamta Khosla and Balwinder Raj Modeling and simulation of carbon nanotube field effect transistor and its circuit application 37 074001-6 SCOPUS Journal of Semiconductors
2016 Amandeep Singh, Mamta Khosla and Balwinder Raj Compact Model for Ballistic Single Wall CNTFET under Quantum Capacitance Limit 37 104001-9 SCOPUS Journal of Semiconductors

Publications Conference

Month-year Authors Type Identifier Title Conference Name
NOV 2025 Geetha Amrutha Mandalapu, Rupa Kasireddy, Amandeep Singh International Any Renowned DOI Comparative Analysis of Top Gate CNTFET and Gate All Around CNTFET Magnitude Comparator 2025 IEEE Silchar Subsection Conference (SILCON)
DEC 2023 Amandeep Singh International Any Renowned DOI Low power Circuit Design Using Dynamic GDI Technique in CNTFET Technology 18th ACM International Symposium on Nanoscale Architectures (NANOARCH ’23)
NOV 2023 Inayat Hussain Wani and Amandeep Singh International Any Renowned DOI Investigating the Impact of Intermediate Modulation Layer in RRAM on Multilevel Perceptron Performance 2023 IEEE Silchar Subsection Conference (SILCON)
DEC 2021 Sanna Mairaj and Amandeep Singh International Any Renowned DOI Modeling of Negative Capacitance Field Effect Transistors Based on Different Ferroelectric Materials International Workshop on the Physics of Semiconductor and Devices, Springer Nature
2021 Sanna Mairaj and Amandeep Singh International Any Renowned DOI Modeling of Negative Capacitance Field Effect Transistors Based on Different Ferroelectric Materials International Workshop on the Physics of Semiconductor and Devices
OCT 2016 Amandeep Singh, Mamta Khosla and Balwinder Raj International Any Renowned DOI CNTFET Modelling and Low Power SRAM Cell Design 2016 IEEE 5th Global Conference on Consumer Electronics (GCCE)
OCT 2015 Amandeep Singh, Mamta Khosla and Balwinder Raj International Any Renowned DOI Comparative Analysis of Carbon Nanotube Field Effect Transistors 2015 IEEE 4th Global Conference on Consumer Electronics (GCCE)

Book Published

  • Amandeep Singh, Mamta Khosla and Balwinder Raj "CNTFETs: modelling and circuit design” VLSI and Post-CMOS Electronics. Volume 1: Design, modeling and simulation, IET, 2019. (Book Chapter), 2019

Books & Chapters

Author Title Chapter Month-Year Publisher ISBN/ISSN DOI
Amandeep Singh, Mamta Khosla and Balwinder Raj VLSI and Post-CMOS Electronics. Volume 1 Design Modeling and Simulation CNTFETs: modelling and circuit design SEP 2019 IET 9781839530517
Amandeep Singh, Mamta Khosla and Balwinder Raj Major Applications of Carbon Nanotube Field-Effect Transistors (CNTFET) CNTFETs: Introduction and Types DEC 2019 IGI Global 9781799813934
Zahied Azam and Amandeep Singh Innovative Applications of Nanowires for Circuit Design Various Application of Nanowire FET NOV 2020 IGI Global 9781799864677
Deep Singh and Amandeep Singh Advanced Circuits and Systems for Healthcare and Security Applications Nanowire FETs for Healthcare Applications SEP 2022 CRC Press 9781003189633
Amandeep Singh Nanoscale Electronic Device Applications of Carbon Nanotubes, Graphene, Silicene and Molybdenum Disulfide Graphene based FETs and MOSFETs AUG 2026 CRC Press 9781032634111

Administrative / Academic Responsibilities

Role Nature of Responsibility Type From To Details
Associate TPO Placements Institute MAR 2019 0 0
Time Table Incharge Preparing Time Table Department NOV 2018 MAY 2023
Deaprtmental Coordinator Implementation of Rajbhasha Institute OCT 2021 0 0
NIRF Coordinator for Graduate Outcome Parameter Preparing Data related to Graduate Outcome Parameter Institute SEP 2021 DEC 2021
Departmental Member of NEP Implementation Committee Impemenation of NEP Institute DEC 2022 0 0
Member DPGC Dealing with MTech and PhD related Issues Department JUN 2023 0 0
VLSI Lab Incharge Managing the Lab Department JUN 2023 0 0
Coordinator OBC Cell To coordinate OBC Cell Institute AUG 2023 0 0
Liasion Officer for OBCs OBC related issues of the Institute Institute AUG 2023 0 0
MTech Coordinator (2023-2025) Batch Issues of MTech (2023-2025) Batch Department AUG 2023 0 0
NBA Criteria 4 Member Collecting Data pertaining to Criteria 4 Department DEC 2019 0 0
NIRF Coordinator for Graduate Outcome Parameter Preparing Data related to Graduate Outcome Parameter Institute AUG 2022 DEC 2022

M.Tech Supervision

Socholar Name Title of research / dissertation Joining Awarded
Inayat Hussain Wani Neuromorphic Computing using Memristor AUG 2021 JUL 2023
Abhimanyu H. Chaurasiya Circuit Simulation using Doping-less MOSFET AUG 2020 JUL 2022
Amir Sharfuddin Realizing of Logic Gates Using Electrostatic Doped Tunnel FET AUG 2020 JUL 2022
Rahul Kuwar Comparative analysis of ternary circuits based on top gate and gate all around CNTFET AUG 2020 JUL 2022
Mohd Ashraf Lone Design and Analysis of Negative Capacitance Based Electrostatic Doped Tunnel FET AUG 2019 JUL 2021
Sabzar Shafi Ganie GAA-CNFET based Ternary Content Addressable Memory AUG 2019 JUL 2021
Mohd Mustafa Performance Analysis of Different TFET Heterostructure Architecture AUG 2018 JUL 2020
Bikrant Raj Comparative Analysis of Different Multipliers with Recoded Booth Wallace Multiplier (Hybrid Multiplier) AUG 2018 JUL 2020
Uppalapati Sudheer Kumar High Speed Vedic Mathematic Multiplier Using Compressors AUG 2018 JUL 2020
Shahid Tariq SRAM Based on Electrostatically Doped Tunnel Field Effect Transistor AUG 2022 JUL 2024
Umer Ali Low Power Circuit Design using GDI Technique AUG 2022 JUL 2024
Aadil Bashir Low Power Circuit Design using Tunnel FET AUG 2022 JUL 2024
BASIT AHMAD RAJA DESIGN AND ANALYSIS OF A LOW-STANDBY POWER TERNARY SRAM ARCHITECTURE AUG 2024 JUL 2026
Uzra Zehra Low Power Design Using Adiabatic Logic AUG 2024 JUL 2026

Short-Term Courses / FDPs / Workshops / Trainings / Conferences

Nature From To Activity Role Details of activity
Organized JUL 2019 JUL 2019 STC Coordinator Hands on Training on EDA Tools
Organized JUL 2019 JUL 2019 STC Coordinator Emerging Electron Devices for Integrated Circuit Applications
Organized MAR 2021 MAR 2021 FDP Coordinator Outcome based Education for the AICTE approved Institutions of UTs of J&K and Ladakh

Expert Talks / Lectures delivered / Reviewers / Other outreach

Nature From To Details of Event / Brief
Conference chair JUL 2019 JUL 2019 Session chair in VDAT 2019 at IIT Indore
Expert Lecture JAN 2020 JAN 2020 Low power applications of CNTFETs at NIT Jalandhar
Expert Talk JAN 2021 JAN 2021 Expert Talk in Online Self Financed Short term Course on Research Trends in Integrated Circuits and Applications organized by Electronics and Communication Engineering Department National Institute of Technology, Jalandhar
Conference chair AUG 2021 AUG 2021 Session Chair at the 8th International Conference on Signal Processing and Integrated Networks (SPIN-2021)