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DEC 2020
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Modifying FPGA Design Flow for Achieving better Circuit Optimizations
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Burhan Khurshid and Abida Yousuf, “Modifying FPGA Design Flow for Achieving better Circuit Optimizations,” 17th IEEE India International Conference, INDICON, December 2020.
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MAR 2019
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Achieving Performance Speed-up in FPGA based FIR Filters using DSP Macro blocks
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Burhan Khurshid, Mayidah Manzoor, Kurteeba Muzaffar, Bazilla Wani and Basit Mushtaq, “Achieving Performance Speed-up in FPGA based FIR Filters using DSP Macro blocks,” IEEE sponsored 6th International conference on Signal Processing and Integrated Networks, pp 190 to 194, March 2019.
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MAR 2019
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Performance Evaluation of Fixed-Point Array Multipliers on Xilinx FPGAs
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Burhan Khurshid, Saniya Syed, Syed Mehtaab, Junaid Peerzada and Adnan Yaqoob, “Performance Evaluation of Fixed-Point Array Multipliers on Xilinx FPGAs,” IEEE sponsored 6th International conference on Signal Processing and Integrated Networks, pp 171 to 175, March 2019.
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DEC 2015
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Improving Synthesis of Fixed-Point Adders on FPGAs using Primitive Instantiations
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Burhan Khurshid and Roohie Naaz, “Improving Synthesis of Fixed-Point Adders on FPGAs using Primitive Instantiations,” 12th IEEE India International Conference, INDICON, December 2015.
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DEC 2015
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High Efficiency Generalized Parallel Counters for Xilinx FPGAs
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Burhan Khurshid and Roohie Naaz, “High Efficiency Generalized Parallel Counters for Xilinx FPGAs,” 22nd IEEE International Conference on High Performance Computing, December 2015.
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MAR 2015
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Optimizing FPGA based Fixed Point Multiplier using Embedded Primitive and Macro-Support
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Burhan Khurshid and Roohie Naaz, “Optimizing FPGA based Fixed Point Multiplier using Embedded Primitive and Macro-Support,” 1st International Conference on Advances in Computers, Communication and Electronic Engineering, March 2015.
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JAN 2015
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Power Efficient Implementation of Bit-parallel Unrolled CORDIC Structures for FPGA Platforms
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Burhan Khurshid and Roohie Naaz, “Power Efficient Implementation of Bit-parallel Unrolled CORDIC Structures for FPGA Platforms,” IEEE Sponsored International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI-SATA), January 2015.
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FEB 2014
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A Hybrid-Radix Approach for Efficient Implementation of Unfolded CORDIC Architectures for FPGA Platforms
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Burhan Khurshid, Roohie Naaz, Animesh Kumar and Shatish Kumar, “A Hybrid-Radix Approach for Efficient Implementation of Unfolded CORDIC Architectures for FPGA Platforms,” IEEE Sponsored 1st International Conference on Signal Processing and Integrated Networks (SPIN), February 2014.
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JAN 2014
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A Hardware Intensive Approach for Efficient Implementation of Numerical Integration for FPGA Platforms
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Burhan Khurshid and Roohie Naaz, “A Hardware Intensive Approach for Efficient Implementation of Numerical Integration for FPGA Platforms,” 27th IEEE International Conference on VLSI Design and 13th International Conference on Embedded Systems, January 2014.
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